1. Field of the Invention
The present invention relates to linear voltage regulators intended for providing a regulated voltage from a reference voltage and a non-stabilized supply voltage. The present invention more specifically relates to regulators having a power element connected in series with the load to be supplied and that are designed to introduce a low series voltage drop (LDO) and to operate with a minimum supply voltage.
2. Discussion of the Related Art
FIG. 1 shows a conventional example of a linear regulator to which the present invention applies. Such a regulator is intended for supplying a load (Q) 2. The regulator is essentially formed of a power MOS transistor 1 intended for being connected in series with load 2. This series connection is connected between a terminal 3 for application of a more positive voltage Vbat and a terminal 4 for application of a more negative voltage (for example, the ground). Voltage Vbat is for example provided by a battery (not shown). Transistor 1 is controlled by a regulation circuit 5, generally based on a differential amplifier. A first inverting input of circuit 5 receives a reference voltage Vref and a second non-inverting input receives output voltage Vout, sampled at the junction point of transistor 1 and load 2. This junction point forms output terminal 6 of the regulator. A capacitor C is generally connected between terminal 6 and the ground to filter and stabilize output voltage Vout.
The operation of a regulator such as illustrated in FIG. 1 is perfectly conventional and will not be detailed. It should only be mentioned that amplifier 5 is, most often, supplied by voltage Vbat and that reference voltage Vref is generally provided by a reference circuit adapted to providing a steady and precise voltage, for example, a circuit of the bandgap type.
An example of application of linear regulators is the field of mobile phones. In this type of application, the telephone battery is used to supply one or several linear regulators that must, downstream, provide the necessary power supplies to the different biasing, control, and digital and analog processing circuits. Voltage Vout provided by the regulator must generally be very precise. For example, in an application to telephony, a precision of plus or minus 3% is desired.
Power transistor 1 is generally large since the regulator must operate over the entire current operating range of the circuits that it supplies downstream. For example, for a regulator that must be able to provide a current as high as 100 mA, the necessary surface area to form the power transistor is on the order of 1 mm2. The greatness of the required surface area is also due to the fact that, to respect the constraint of a low series voltage drop, the resistance of transistor 1 must be, in the on state (RdsON), as small as possible.
A consequence of the large bulk of the power transistor is that its gate capacitance is generally relatively high. For example, for a transistor of the type indicated hereabove as an example, a gate capacitance on the order of 100 picofarads is obtained.
A problem that is then raised is due to the occurrence of overvoltages at the regulator start-up. Indeed, when the circuit is off, the output voltage is null and amplifier 5 accordingly is not balanced.
When the circuit is powered on or, more precisely, when the regulator is turned on by a specific signal, transistor 1 then provides a high current to capacitor C being charged. As long as voltage Vout does not reach the desired output voltage Vref, amplifier 5 remains unbalanced. When voltages Vout and Vref become equal, the output terminal of amplifier 5 switches to stop the providing of a high current by transistor 1. However, due to the high gate capacitance of transistor 1, said gate is not immediately charged, which results in a delay in the circuit response. The output voltage then exceeds the desired value and an overvoltage appears.
This overvoltage must remain within acceptable limits according to the tolerances required for the output voltage. The higher the gate capacitance, the more difficult it is to fulfil this constraint.
The output stage (not shown in FIG. 1) of amplifier 5 is generally formed of an N-channel MOS transistor (more precisely, of a channel type opposite to that of the power transistor) in series with a current source. The current source is itself in parallel with a so-called gate resistor, the function of which precisely is to charge the gate capacitor of power transistor 1 when the amplifier output switches. The gate resistor is also used to set the amplifier gain and conditions the circuit stability. Another function of this resistor is to bias the output stage of amplifier 5. Accordingly, the value of this resistor also conditions the circuit switching. Now, of course, in applications where a high miniaturization is desired, it is also desired to minimize the power consumption for obvious reasons of autonomy.
Accordingly, it can be seen that it is not desirable to act upon this resistance, if it is not desired to see the regulator characteristics deteriorate in steady state.
The present invention aims at providing a novel solution that overcomes the problems of overvoltage upon start-up of conventional linear regulators.
The present invention aims, in particular, at providing a solution that is compatible with a low steady-state circuit consumption.
The present invention also aims at providing a solution that can be easily parameterized to set the circuit response time upon start-up.
A first solution would be to modify the voltage reference of the amplifier during the start-up. However, this solution is not desirable in practice since a same voltage reference is generally used by several linear regulators. Accordingly, modifying this reference would risk adversely affecting the operation of other regulators that would be in steady state.
The present invention aims at providing a solution that is compatible with an individualized operation of several regulators using a same voltage reference.
To achieve these and other objects, the present invention provides a linear regulator of the type including a power MOS transistor of a first channel type, controlled by an amplifier having an output stage including, between two terminals of application of a supply voltage, a first resistor and a first MOS control transistor of a second channel type, the regulator including a start-up circuit having a switchable resistor in parallel on said first resistor.
According to an embodiment of the present invention, the start-up circuit includes, in series between the source and the gate of the power MOS transistor, said switchable resistor and first and second MOS control transistors of the first channel type.
According to an embodiment of the present invention, the two MOS control transistors of the start-up circuit are on upon turning-on of the regulator, the turning-off of the first transistor being progressive by means of a control ramp.
According to an embodiment of the present invention, the second transistor of the start-up circuit is turned off at the end of the turn-off ramp of the first transistor.
According to an embodiment of the present invention, the duration of the turn-off ramp of the first transistor is chosen to be much greater than the time necessary, at the output of the linear regulator, to reach a desired voltage.
According to an embodiment of the present invention, the start-up circuit includes a ramp generator for controlling the first control transistor and a locking logic circuit to abruptly turn off the second control transistor at the end of the control ramp of the first transistor.
According to an embodiment of the present invention, the resistance of the start-up circuit is at least ten times smaller than the resistance of the output stage of the control amplifier.
According to an embodiment of the present invention, the power transistor has a P channel to form a positive voltage regulator.
According to an embodiment of the present invention, the power transistor has an N channel to form a negative voltage regulator.
The present invention also provides a method for controlling a linear regulator formed of a power MOS transistor and of a regulation amplifier having an output stage including, in series between two supply terminals, a resistor and a MOS control transistor of channel type opposite to that of the power transistor, the method including decreasing the value of said resistor upon start-up of the regulator.
According to an embodiment of the present invention, the method includes switching a resistor in parallel with the resistor of the output stage of the amplifier.
The foregoing objects, features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.